{"schemaVersion":1,"kind":"project","documentationUrl":"https://decomphub.com/data","project":{"id":"b5742924-fcae-4701-810f-89385a2beb93","slug":"anlogic-al3-10-analyzing","revision":2,"name":"Anlogic_AL3-10_Analyzing","description":"An attempt to reverse engineer a bitstream made for an AL3-10 FPGA","url":"https://app.decomphub.com/projects/anlogic-al3-10-analyzing","jsonUrl":"https://app.decomphub.com/data/projects/anlogic-al3-10-analyzing.json","markdownUrl":"https://app.decomphub.com/data/projects/anlogic-al3-10-analyzing.md","category":"hardware","workTypes":["reverse-engineering"],"targets":["AL3-10 FPGA"],"status":"unknown","publishedAt":"2026-10-06T19:47:23.083Z","updatedAt":"2026-10-06T19:47:23.083Z","repository":{"url":"https://github.com/pecostm32/anlogic_al3-10_analyzing","host":"github.com","fullPath":"pecostm32/anlogic_al3-10_analyzing","description":"An attempt to reverse engineer a bitstream made for an AL3-10 FPGA","license":"GPL-3.0","starCount":16,"starsCheckedAt":"2026-10-10T06:40:28.037Z","upstreamArchived":false,"defaultBranch":null,"latestDefaultBranchCommitAt":null,"metadataCheckedAt":"2026-10-06T19:44:26.086Z"},"progress":[],"sources":[{"label":"Public repository metadata","url":"https://github.com/pecostm32/anlogic_al3-10_analyzing"},{"label":"Discovery query","url":"https://api.github.com/search/repositories?q=%22reverse+engineered%22+in%3Aname%2Cdescription+is%3Apublic+fork%3Afalse+created%3A2019-11-17..2022-04-01&sort=updated&order=desc&per_page=100&page=2"}],"longDescription":"","aliases":[],"originalPlatforms":[],"outputPlatforms":[],"architectures":[],"languages":["C"],"tags":[],"links":{"website":null,"documentation":null,"releases":null,"buildInstructions":null,"repositories":[],"community":[],"support":[],"issues":[]},"contribution":{"status":"unknown","helpNeeded":[],"url":null,"sourceUrl":null,"checkedAt":null,"prerequisites":"","environments":[],"aiPolicy":"unspecified","aiPolicySourceUrl":null,"aiPolicyConditions":""},"originalAssetsNote":""}}