# uPD7220\_sv

[DecompHub listing](<https://app.decomphub.com/projects/upd7220-sv>) · [JSON record](<https://app.decomphub.com/data/projects/upd7220-sv.json>)

## Description

> NEC μPD7220 / Intel 82720 GDC reimplementation in SystemVerilog

- Category: hardware
- Work types: reimplementation
- Targets: NEC μPD7220 / Intel 82720 GDC
- Project status: unknown
- Listing updated: 2026\-10\-10T03:31:08\.136Z
- Listing first published: 2026\-10\-10T03:31:08\.140Z

## Repository

- Repository: [birdybro/upd7220\_sv](<https://github.com/birdybro/upd7220_sv>)
- License: MIT
- Repository stars: 1
- Stars checked: 2026\-10\-10T02:16:10\.799Z
- Repository metadata checked: 2026\-10\-10T02:16:10\.799Z

## Progress

Each value describes only its stated scope. An observation date is when DecompHub read the source; it is not a publisher measurement date.

No sourced numeric progress is currently reported. This is unknown progress, not 0%.

## Project details

- Languages: Python

## Contributing

- Contribution status: unknown
- Help requested: Not reported
- Contribution instructions: Not reported
- Contribution source: Not reported
- Contribution information checked: Not reported
- AI contribution policy: unspecified
- AI policy source: Not reported

## Listing sources

- [Public repository metadata](<https://github.com/birdybro/upd7220_sv>)
- [Discovery query](<https://api.github.com/search/repositories?q=%22reimplementation%22+in%3Aname%2Cdescription+is%3Apublic+fork%3Afalse+created%3A2026-07-23..2026-09-14&sort=updated&order=desc&per_page=100&page=5>)

## Data notes

Descriptions remain in their recorded source language. Missing values are not inferred. Repository licensing is upstream metadata; this export does not grant rights to upstream code or assets.

Schema version: 1. [Public data documentation](<https://decomphub.com/data>).