{"schemaVersion":1,"kind":"project","documentationUrl":"https://decomphub.com/data","project":{"id":"76c1fdf8-152b-4e6e-a7ff-4bbf08659aa8","slug":"xc9500","revision":2,"name":"XC9500","description":"WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.","url":"https://app.decomphub.com/projects/xc9500","jsonUrl":"https://app.decomphub.com/data/projects/xc9500.json","markdownUrl":"https://app.decomphub.com/data/projects/xc9500.md","category":"hardware","workTypes":["reverse-engineering"],"targets":["XC9500"],"status":"unknown","publishedAt":"2026-10-07T02:02:56.534Z","updatedAt":"2026-10-07T02:02:56.534Z","repository":{"url":"https://github.com/anuejn/xc9500","host":"github.com","fullPath":"anuejn/xc9500","description":"WIP open source tooling for the XC9500 / XC9500XL series of CPLDs from Xilinx.","license":null,"starCount":11,"starsCheckedAt":"2026-10-07T01:58:29.707Z","upstreamArchived":false,"defaultBranch":null,"latestDefaultBranchCommitAt":null,"metadataCheckedAt":"2026-10-07T01:58:29.707Z"},"progress":[],"sources":[{"label":"Public repository metadata","url":"https://github.com/anuejn/xc9500"},{"label":"Discovery query","url":"https://api.github.com/search/repositories?q=topic%3Areverse-engineering+is%3Apublic+fork%3Afalse+created%3A2018-09-09..2019-11-16&sort=updated&order=desc&per_page=100&page=3"}],"longDescription":"","aliases":[],"originalPlatforms":[],"outputPlatforms":[],"architectures":[],"languages":["Python"],"tags":[],"links":{"website":null,"documentation":null,"releases":null,"buildInstructions":null,"repositories":[],"community":[],"support":[],"issues":[]},"contribution":{"status":"unknown","helpNeeded":[],"url":null,"sourceUrl":null,"checkedAt":null,"prerequisites":"","environments":[],"aiPolicy":"unspecified","aiPolicySourceUrl":null,"aiPolicyConditions":""},"originalAssetsNote":""}}